1. Field
The present specification relates generally to semiconductor integrated circuits and amplifiers employing a semiconductor integrated circuit for driving an acoustic element, and in particular to semiconductor integrated circuits and such amplifiers capable of reducing a pop sound while minimizing a voltage transition settling time for settling a voltage transition when an operational condition changes.
2. Discussion of the Related Art
A conventional amplifier driving an acoustic element such as a headphone sometimes generates a strange sound such as a pop sound, when an operational condition changes, such as when electric power is supplied for the first time, a sleep mode which saves electric power consumption starts or is terminated, etc. Such a pop sound is generally reduced by using a prescribed voltage signal which has rise and decay moderated by a large capacitance (CLARGE) and a plurality of resistances (R0, R1) which have a prescribed decay time constant as discussed in the Japanese Utility Model Patent Publication No. 7-22898. Reference signs “M0”, “slp”, and “out” appearing in the publication represent a MOS transistor, an input signal designating a sleep mode, and an output signal output from a driving amplifier, respectively. Specifically, in order to reduce the pop sound, the output itself is directly moderated. Otherwise, a reference voltage input to the driving amplifier is moderated in order to indirectly moderate the output.
Rising (or decaying) waveforms of such input and output signals “slp” and “out” are exemplified in FIGS. 8A and 8B, and are generally calculated by the following formula, wherein the reference signs “A”, “T”, “C”, and “R” represent a change in a voltage in accordance with a change in an operational condition, time elapsing, capacitance, and a resistance value, respectively:A×(1−exp(−T/(C×R)))
According to such a state of art, however, an inclination of the voltage is sharpest immediately after commencement of charging or discharging a capacitor element as illustrated in FIG. 8B, and thereby the pop sound is likely generated. In order to avoid the pop sound from reaching a displeasurable level, a high voltage transition settling time, for example, a few seconds, are necessitated in such a state of art. As a result, voltage transition settling time necessarily delays an up and run time for an instrument, when the electric power is supplied for the first time or the like occurs as a problem.